As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
An information handling system may include a local bus for connecting peripheral devices to expand the functionality of the system. One such local bus may be a parallel bus, such as the Peripheral Component Interconnect (PCI) bus. Typically, a bus bridge and multiple expansion slots are connected to the PCI bus. The bus bridge functions to provide an interface between a CPU local bus and the PCI bus by controlling signals communicated between the local bus and the PCI bus. Peripheral devices may be added to the information handling system by inserting the peripheral devices into the expansion slots connected to the PCI bus.
Originally, the PCI bus operated at a single bus speed of approximately 33 MHz. Consequently, peripheral devices intended for use on the PCI bus were designed to operate at the original bus speed. Through advances in technology, the PCI bus became capable of operating at higher bus speeds. Additionally, peripheral devices intended for use on the PCI bus were also designed for use at the higher bus speeds. However, peripheral devices not capable of operating at the higher bus speeds may still be used in certain systems to reduce the cost and support backward compatibility. The PCI bus, therefore, typically supports multiple bus speeds.
In order to support the higher bus speeds, the number of expansion slots in the system must be reduced. The reduction in the number of expansion slots is due to loading constraints required by timing and signal integrity guidelines for the PCI bus as defined by the industry standard PCI specifications. Consequently, a system that supports multiple bus speeds on the same PCI bus may only have a limited number of expansion slots connected to the PCI bus.
In certain circumstances, a user of an information handling system may want the option of operating the PCI bus at more than one bus speed. Previous solutions have resolved the contention between maximizing the number of expansion slots in a system and operating the PCI bus at a higher bus speed by determining whether a peripheral device is present in each of the expansion slots in the system and determining whether the devices are capable of operating at the higher bus speeds. If the peripheral devices can operate at the higher bus speeds and the host bridge is capable of driving the number of peripheral devices in the system at the higher bus speeds, the bridge drives the PCI bus at the highest possible bus speed. These solutions, however, fail to take into account that the load associated with empty expansion slots may reduce the performance of the bus if the bus is operated at a higher bus speed.